We’ve started to blossom as spring approaches, and Twitter has begun to blossom with new GPU rumors. So far there has been a lot of reporting on Nvidia’s next-generation Ada Loveless architecture. Rumors from AMD, however, have been extremely rare. Interestingly, Nvidia rumors that a nuclear reactor uses GPU 600W power. This has led people to wonder why Nvidia will go all out in power consumption and the answer may be obvious: because it is.
The latest rumor comes from a significant liqueur Grameen 55 On Twitter, who is a prolific GPU tipstar. Their latest Intel is AMD’s RDNA3 GPU consisting of seven chiplets. There will be two 5nm Graphic Complex Dice (GCD), four 6nm Memory Complex Dice (MCD), and an interconnect. Although variations of this rumor have been reported before, it was not clear how many chiplets AMD would use. All of these chiplets will be produced by TSMC and will be AMD’s first multi-chip module (MCM) GPU. For those who live under the rock, AMD has already been building chiplet-based CPUs for years, so this is not its first rodeo. An interesting twist in the rumors is that MCD was formerly called a multi-cash dye, but has now been renamed. Videocards report that no one is sure what it does. It is also not clear whether it is stacked vertically on the GCD or somewhere in the package. It was previously reported that the GPU would offer 256MB of Infinity cache per module for a total of 512MB. It is quite possible that the cache may be part of the MCD.
Good yields are obtained by having multiple, small chiplets versus one monolithic dye. It is also seen as an intelligent aspect for chip packaging as it is becoming increasingly difficult to create huge dyes on advanced nodes. Despite the difficulties, Nvidia sticks to its exclusive guns for its next-generation loveless GPUs. However, there are rumors that it will probably be the company’s last GPU with that design. In January, Nvidia published a research paper on how MCM tests designs for future products.
The special challenge of the chiplet, where the GPU is involved, is to control the interconnection power. CPUs communicate with each other, but GPUs are designed for parallel processing, not CPUs. To bring MCM-based GPUs to the market, AMD, Nvidia and Intel all need to address these challenges.
RDNA3 should be quite strong, despite the fact that it is moving in small chiplets instead of huge dyes. As we reported earlier, there should be 7,680 cores per GCD and a total of 15,360 cores. This compares favorably with the current RX 6900 XT 5,120 “streaming processor”. AMD is clearly heading in a radical new direction. Other exciting rumors include that the GPU will offer 32GB of GDDR6 memory on a 256-bit memory bus. That’s pretty small for many of these cores.
While Nvidia’s Loveless flagship will probably offer a wider 384-bit memory bus, AMD’s generous on-die cache could equal the playing field. However, Nvidia is already preparing for this, and there are rumors of a significant increase in Loveless L2 cache. The latest rumor, based on Nvidia’s Lapsus $ hack, suggests that Team Green will increase its L2 allocation by a staggering 16x. That means it will go from 6MB in amperes to 96MB with Loveless This is still theoretically lower than the AMD proposal, although we do not have a strong number of next-gen Infinity cache allocations. Either way, this is going to be one for the upcoming GPU showdown era. Our power supply is already sweating just thinking about it.